Électronique et automatique
223 documents à télécharger gratuitement
Cours, examens, TD, TP et exercices de électronique et automatique. Thèmes couverts : automatisme, asservissement, microcontrôleur, Arduino, VHDL, signal.
This document provides examples of statecharts illustrating various systems such as a car wash machine, a command launch system, and a gas burner control. Each example describes the state transitions and the conditions triggering changes in system states. The document concludes with an example of a timed automaton for door control using a digicode.
Ce document présente les concepts de conception de systèmes numériques, en se concentrant sur les portes logiques CMOS. Il couvre les techniques de conception Full Custom, les optimisations pour le nombre de transistors, et explique le fonctionnement des réseaux NMOS et PMOS dans les circuits logiques. Les étapes de conception des circuits C-MOS sont également détaillées.
This document outlines the co-design process for System on Chips (SoCs) with a focus on specifications, modeling, partitioning, synthesis, validation, integration, and testing. It provides a detailed example of a GPS system design, including performance criteria, interface requirements, and partitioning considerations. The aim is to guide designers in creating efficient hardware and software architectures that meet specified requirements.
This document contains exercises on CMOS inverters, including graphical representation of output-input relationships, voltage calculations, and transistor operation modes. It also covers Pseudo-NMOS inverters and critical voltage parameters for various configurations.
This document discusses the static electronic operation of a CMOS inverter, analyzing its output voltage as a function of input voltage and the current consumption. The document includes calculations for key parameters and characteristics related to the inverter's performance. It also provides graphical representations and equations for evaluating the behavior of the device under various conditions.
This document studies the static transfer curve of a CMOS inverter consisting of complementary transistors and determines its characteristic and short-circuit current during switching. Key calculations are conducted including output and input voltage levels, noise margins, switching voltage, and maximum short-circuit current. The goal is to define a transistor schematic for a boolean function with three inputs based on the given truth table.
This document covers the dynamic behavior of inverters in electronic circuits, focusing on rise time, fall time, propagation delay, and power consumption. It provides mathematical models to analyze the performance of CMOS inverters under various conditions. The document concludes with examples of power consumption in a memory bank design.
This document outlines an exam for an electronics course focused on embedded systems. It consists of three exercises covering JK flip-flops, NMOS and PMOS transistor functioning conditions, and circuit design including logical schemes and boolean equations. Students are required to justify their answers and provide schematic representations for various electronic components.
Ce document présente les portes logiques CMOS dans le cadre d'un cours d'électronique. Il détaille la définition des portes logiques, leur conception en utilisant des réseaux de transistors NMOS et PMOS, ainsi que les étapes nécessaires à la conception de circuits CMOS. Des méthodes d'optimisation sont également discutées.
This document presents an electronic static analysis of a CMOS inverter, detailing its characteristic Vout = f(Vin) and current consumption. It also covers the realization of a CMOS circuit for a boolean function with a three-input truth table, providing a methodology for synthesis. The course highlights the principles of conduction networks in electronic design.
This document provides an analysis and correction elements for the first class of the course on electronic circuits, focusing on the operation of a CMOS inverter. It examines the static electronic functioning and output characteristics of the circuit. It also includes detailed calculations and graphical representations of voltage characteristics.
This document contains an examination for the course 'Electronique pour Embarqué'. It includes three exercises covering the design and analysis of electronic circuits, specifically focusing on NMOS and PMOS transistors. Students are required to justify all their answers and work through complex circuit diagrams and behaviors.
This document outlines an exam on embedded electronics conducted on June 17, 2012. It contains three exercises that require students to justify their answers related to transistor circuits and logic designs. The exam is supervised by instructor L. Latrach and is for a make-up session.
This document discusses the advancements and principles of the MOS transistor, highlighting its superiority over bipolar transistors in various applications. It covers its structural and behavioral descriptions, including various operational modes. The document also provides analytical developments and practical examples of MOS technology usage.
This document is an exam for embedded electronics covering logic circuits, transistors, and signal behavior through various exercises. Students are required to provide schematic representations and justifications for their answers. The exam tests understanding of NMOS and PMOS transistors and their applications in circuit design.
This document outlines an electronics exam covering topics related to JK flip-flops, NMOS and PMOS transistors, and circuit design. It consists of three exercises that require students to provide detailed answers and justifications for various electronic components and principles. The exam was conducted by instructor L. Latrach on June 17, 2012.
The document outlines an analysis of a CMOS inverter circuit, focusing on its static transfer characteristic and determining key voltage levels and current parameters during switching. It includes specific calculations and theoretical inquiries related to the inverter's performance and design considerations.
This document illustrates the procedure to automate filament or color changes during 3D printing by inserting the 'M600' command into the GCode file. Users are instructed to slice their object, identify the relevant layer numbers using visualization tools, and edit the GCode file using a text editor to include 'M600' at specified layers. Multiple filament changes can be programmed by repeating the operation for different layers. The modified GCode is then saved and transferred to the 3D printer's SD card for execution.
This document provides instructions for automating filament color changes during 3D printing by inserting the 'M600' command into the GCode file. Users must identify the layers where filament changes are required, using visualization tools in Repetier or Simplify3D. The steps involve editing the GCode with a text editor to insert the 'M600' command after specific layers, then saving the modified file to use in a 3D printer. Multiple filament changes can be configured in the same object print by repeating the process for different layers.
This document consists of an exam paper from Ecole Nationale des Sciences de l’Informatique. It covers topics related to modulation, signal processing, and the analysis of various signals. The exam includes independent exercises that require mathematical analysis and problem-solving skills in the field of digital transmission.
This document contains solutions to exercises on amplitude modulation and signal processing. It includes derivations for signal representations, auto-correlation functions, and power spectral densities. The document also discusses the effects of phase errors in demodulation and their implications.
The document discusses the evaluation of performance in EEG inverse problem algorithms by defining a criterion for measuring the quality of the obtained solution against a known ground truth. It focuses on comparing the dipole localization error between original and estimated dipoles across different algorithms. The analysis includes qualitative and quantitative comparisons of the Gibbs sampler, MNE, and SISSY algorithms under various noise conditions.
This document outlines instructions for a lab session focused on digital electronics using the ISIS simulation software. Students learn to simulate logical operators, construct truth tables, and validate Boolean equations. Assignments include designing combinational circuits, analyzing output chronograms, and developing a binary-encoded decoder for a 7-segment display. Simulation steps are emphasized for result validation using virtual instrumentation tools.
The document is a detailed tutorial aimed at mastering the interactive mode of the ISIS Proteus 7 Professional software. It focuses on creating, testing, and validating various logic gates and their behaviors through simulations. The exercises guide users on testing fundamental gates (AND, OR, NOT) and their combinations, enabling the understanding of component properties and truth table generation. The document concludes with practical applications to confirm logical equivalence between circuits using Proteus simulations.